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          頭文件AT89x051.H

          作者: 時(shí)間:2011-05-06 來(lái)源:網(wǎng)絡(luò) 收藏

          本文引用地址:http://yuyingmama.com.cn/article/172811.htm

          /*------------------------------------------------
          P3 Bit Registers (Mnemonics Ports)
          ------------------------------------------------*/
          sbit P3_0 = 0xB0;
          sbit P3_1 = 0xB1;
          sbit P3_2 = 0xB2;
          sbit P3_3 = 0xB3;
          sbit P3_4 = 0xB4;
          sbit P3_5 = 0xB5;
          /* P3_6 Hardwired as AOUT */
          sbit P3_7 = 0xB7;

          sbit RXD = 0xB0; /* Serial data input */
          sbit TXD = 0xB1; /* Serial data output */
          sbit INT0 = 0xB2; /* External interrupt 0 */
          sbit INT1 = 0xB3; /* External interrupt 1 */
          sbit T0 = 0xB4; /* Timer 0 external input */
          sbit T1 = 0xB5; /* Timer 1 external input */
          sbit AOUT = 0xB6; /* Analog comparator output */

          /*------------------------------------------------
          IP Bit Registers
          ------------------------------------------------*/
          sbit PX0 = 0xB8;
          sbit PT0 = 0xB9;
          sbit PX1 = 0xBA;
          sbit PT1 = 0xBB;
          sbit PS = 0xBC;

          /*------------------------------------------------
          PSW Bit Registers
          ------------------------------------------------*/
          sbit P = 0xD0;
          sbit FL = 0xD1;
          sbit OV = 0xD2;
          sbit RS0 = 0xD3;
          sbit RS1 = 0xD4;
          sbit F0 = 0xD5;
          sbit AC = 0xD6;
          sbit CY = 0xD7;

          /*------------------------------------------------
          Interrupt Vectors:
          Interrupt Address = (Number * 8) + 3
          ------------------------------------------------*/
          #define IE0_VECTOR 0 /* 0x03 External interrupt 0 */
          #define TF0_VECTOR 1 /* 0x0B Timer 0 */
          #define IE1_VECTOR 2 /* 0x13 External interrupt 1 */
          #define TF1_VECTOR 3 /* 0x1B Timer 1 */
          #define SIO_VECTOR 4 /* 0x23 Serial port */

          /*------------------------------------------------
          ------------------------------------------------*/
          #endif


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